Agile Photonic Integrated Systems-on-Chip enabling WDM Terabit Networks
[April 2008 – September 2011]

Project Overview

APACHE aimed to develop photonic integrated components capable of generating, regenerating and receiving signals of various modulation formats and rates involving amplitude- and differentially phase- encoded signals (i.e. OOK, DPSK and DQPSK) for high capacity agile WDM optical networks. Component fabrication within APACHE focused on the development of a hybrid integration technology platform for the integration of high performance monolithic active elements based on Indium Phosphide (InP) on low loss silica-on-silicon substrates, enabling the development of advanced photonic integrated circuits (PICs) with complex functionalities on chip.
More specifically, APACHE envisaged highly ambitious objectives that dealt with the design and fabrication of a) two types of transmitter arrays suitable for metro/core terabit network applications, b) a multi-format signal processing chip suitable for signal regeneration and wavelength conversion of different modulation formats and c) receiver arrays suitable for amplitude and phase encoded signals. The building blocks that were developed comprised arrays of: nested IQ Mach Zehnder Modulators (MZMs) and tunable distributed-feedback (DFB) laser arrays targeting up to 200 Gb/s throughput for single chips and terabit capacity (5x200Gb/s) for the array device, arrays of reflective electro-absorption modulators (REAMs) and arrays of reflective SOA-based lasers targeting 10x10Gb/s low cost metro applications, arrays of detectors with integrated delay interferometers for phase decoding on chip and SOA arrays embedded on complex Mach Zehnder Interferometer (MZI) structures for signal processing functionalities. The fabrication activities were supported by sophisticated simulation and software design tools that were developed within the project. Within APACHE, a full version of a software ‘design kit’ for photonic integration was demonstrated commercially and comprised the first design tool for the integration of optical circuits. Finally, the developed photonic devices have been successfully characterized and tested under laboratory and real network WDM transmission scenarios. Benchmarking of the APACHE devices against Ericsson transponders demonstrated that the APACHE technology would be an eligible solution for 100G systems in the next two or three years when their overall cost was expected to be further reduced.
The APACHE research outcomes and results have been presented in several International conferences, exhibition halls and variable types of audiences as well as in peer reviewed journals and magazines. A number of invited talks and paper contributions regarding the APACHE technology have been carried out. The exploitation of the APACHE technology within industry and commercial use was also one of the main targets of the project. The commercial version of the first software design kit platform was released within the duration of the project. Also, the consortium continuously pursued to advance the knowledge and experience gained within APACHE by promoting external contracts with industrial partners. In all, APACHE successfully completed most of its technical goals and promoted the dissemination and exploitation of results yielding a direct impact on the socio-economic and the societal position of the European Community.

Summary of project context and objectives

The APACHE project focused on the development of integrated photonic components capable of generating, regenerating and receiving amplitude- and phase- encoded signals for high capacity (40 Gb/s and 100 Gb/s) WDM optical networks. The APACHE vision was to develop photonic integrated multi-functional agile optical transmitters and receivers suitable for the generation and reception of different modulation formats (i.e. OOK, DPSK and DQPSK and different rates). Furthermore, the APACHE vision was to develop a multi-format processing element with advanced aggregated functionalities on chip offering wavelength conversion and/or regeneration for multi-format (amplitude and phase) and variable-rate signals. Component fabrication within APACHE was based on the hybrid integration of high performance InP monolithic chips on low-loss silica-on-silicon circuits. Cost-reduction was pursued through photonic integration of passive and active elements on single chips yielding multi-functional devices by sharing the technology knowledge and device fabrication costs, by broadening the applicability of the devices to several transmission scenarios and network topologies.

The objectives of the APACHE project are listed and briefly described below:

  • Development of advanced hybrid integration platform: A unified method was to be defined for the hybrid devices that would enable hosting large monolithic chips. Mode sizes of the optical components as well as the alignment features necessary for the assembly were to be determined.
  • Development of Indium Phosphide hybrid “add-ons”: These were monolithic InP components (modulators, amplifiers, photodiodes) capable of passive assembly on the silicon submounts and subsequently on the silica-on-silicon motherboard
  • Modeling, simulation tools development: The development of a variety of sophisticated software tools was aimed at the design and simulation of specific components. These tools would enable efficient modeling of large scale photonic systems-on-chip so as to maximize yield of the fabrication process and optimize performance of the final integrated devices. Additional functionality to combine designs from the different material domains, supported by auto-routing and fabrication rules as well as the actual manufacturing process tolerances was to be included in the models.
  • Development of arrays of WDM lasers: Continuous wave (cw) laser arrays aimed to be developed, compatible with the APACHE monolithic-on-hybrid integration technique. Two designs were to be pursued during the project based on DFB and reflective semiconductor optical amplifier (RSOA) arrays, respectively. These two approaches were complementary in terms of network application, since uncooled RSOA arrays were targeting metro and access networks, whereas cooled DFB lasers were targeting core and ultra-longhaul networks.
  • Fabrication of nested InP Mach-Zehnder modulator arrays: Multi-functional InP modulators were to be developed through fabrication of arrays of Mach-Zehnder modulators (MZMs). The arrayed modulators aimed to be appropriately interconnected either internally by InP waveguides or externally by silica waveguides on the motherboards forming nested MZM structures that would be suitable for OOK, DPSK and DQPSK modulation formats.
  • Scaling photonic integrated circuits: Fabrication of arrays of nested InP Mach-Zehnder Modulators and DFBs: A single photonic device (multi‐functional transmitter) capable of multiple modulation formats and of generating one Tb/s on‐chip was to be fabricated using the APACHE integration approach. In this way the limits of monolithic integration and the corresponding scaling path were to be identified.
  • High-Speed receiver arrays: Arrays of high bandwidth photodiodes would be integrated into a single photonic integrated circuit to develop a WDM (multi‐channel) DPSK receiver using the APACHE integration approach. The APACHE receiver would include all DC and RF fan‐outs in a single package and will provide 50‐80% cost reduction by sharing packaging and pigtailing costs.
  • Multi-functional optical regenerator modules: All‐optical regenerators capable of processing multiple modulation formated signals at bit‐rates exceeding 100 Gb/s were to be developed. Selectable regeneration of OOK/DPSK/DQPSK signals would be feasible according to input ports and signal propagation within the photonic chip.
  • APACHE technology exploitation: Commercialization of the APACHE technology would be targeted in a stepwise fashion during and after the end of the project. The developed technology would be integrated in the product lines of Ericsson, CIP and HHI as well as the software tool portfolio of PhoeniX Software.

Main Scientific and technical S&T results/foregrounds

To accomplish its objectives, APACHE based the organisation of the necessary management and RTD around 6 work-packages (WPs) as shown in Figure 1 below.


The main technical achievements of APACHE are listed and described below per work package:

Work Package 2: Device and Sub-system: Design, Specifications and Tools

Besides working on the pure fabrication processes, APACHE placed equal weight to the development of software tools for the design and simulation of specific components and the simulation of the manufacturing execution process itself. This holistic approach has proved extremely useful.


Figure 2: (a) Three major categories for PhoeniX Software solutions: Manufacturing Automation, Design Flow Automation and Design Kits, (b) Design Kit information at the PhoeniX Software website for active components in HHI technology, combined with a CIP daughterboard, motherboard and package.

The software technology was centrally driven by commercial requirements that have been updated during the course of the project. The suite of simulation tools that were developed into commercial prototypes and releases includes a 3D BPM module, the Semiconductor Optical Amplifier software module, the integration platform auto-routing module and the process tolerance analysis tool. All these components have been developed within WP2, which started in month M01 and continued until the end of the project. A specific objective for the last period of the project was to elaborate on the integration of different software tools into a unified commercial platform and significant steps were made to this direction.
The different simulation tools derived from WP2 were finally tested and utilized within APACHE for modelling the targeted components and optimizing fabrication processes. A specific example refers to the use of the “Process tolerance analysis tool” for the design and the fabrication of the arrayed-waveguide grating (AWG) on the silica platform by CIP.

Work package 3: Photonic Add-Ons for Hybrid Platform

WP3 started in M03 and continued until the end of the project. Within WP3, APACHE succeeded in the development of all targeted monolithic chips to serve as the active building blocks for the transmitter, receiver and regenerator modules. Over the 3.5 years of the project, APACHE developed successive generations of: 1) 10-way arrayed DFB lasers, 2) 5-way arrayed reflective SOAs (RSOAs), 3) 10-way arrayed reflective EAMs (REAMs), 4) twin IQ-modulator chip (with 4 Mach-Zehnder modulators), 5) 4-way and 10-way pin photodiodes, and 6) quad arrays of ultra-fast nonlinear SOAs. Arrays of novel ridge RSOAs were also developed for further simplification of the fabrication process and even lower fabrication cost. All these chips featured high-performance in all aspects and the targeted characteristics in terms of mode-profile and suitability for flip-chip bonding on the silica-on-silicon platform. Compared to the state-of-the-art in InP monolithic integration defined today by Infinera, the “1D” APACHE chips featured similar “functional width” (e.g. 10-channel operation for laser arrays) and similar performance in terms of bandwidth, tunability etc, revealing the true success of the project from this point of view.

Work package 4: APACHE Hybrid Integration Platform

WP4 started in M03 and ran until the end of the project. Its main objectives were the fabrication of Si submounts and silica circuits for the assembly of the monolithic chips, the overall development of the hybrid devices, their packaging and their characterization at the system-level. Significant achievements over the duration of the project have been the following:

  • Si-submount fabrication: The silicon submount development process was designed again from the beginning resulting in a yield over 90%. Using the new process, the silicon submounts (daughterboards) for all monolithic chips were developed (10-fold DFB array, 5-fold RSOA array, 10-fold REAM array, twin-IQ modulator, pin-photodetector array, quad nonlinear SOA array).
  • Silica motherboard fabrication: Motherboards were prepared for all targeted devices (DFB-based multi-wavelength laser, twin-IQ modulator, RSOA-based multi-wavelength laser, REAM-based 10-channel modulator, DQPSK receiver, optical regenerator and the final multi-functional transmitter). Fabrication of complex AWG structures on the silica-on-silicon platform with great accuracy in the definition of the pass-bands characteristics (wavelength, bandwidth) was achieved.
  • Fabrication of hybridly integrated devices (sub-blocks): The InP monolithic chips were assembled on the silica-on-silicon platform and the following devices were fabricated and packaged: 1) Optical regenerator/wavelength-converter, 2) DFB laser sub-block for the multi-functional transmitter, 3) RSOA laser sub-block for the low-cost 100 Gb/s OOK transmitter, 4) REAM sub-block for the low-cost 100 Gb/s OOK transmitter, and 5) DQPSK receiver sub-block. The fabricated devices are depicted in Figure 2. Unfortunately, it has not been possible to additionally assemble the larger in size (7.6×4.3 mm2) twin-IQ modulator chip on the silicon submount due to the chip bow and wrapping during the assembly process. The reasons for this problem and the routes for solving it have been identified and will be addressed out of APACHE project in the post-APACHE era.

Figure 3: Optoelectronic devices hybridly integrated and packaged by APACHE.

Work package 5: Terabit-capacity testbed & transmission performance of APACHE devices

WP5 started in M16 and continued until the very last day the project. Its main objective was the setup of a Terabit-capacity testbed for the system-level testing of APACHE modules in a lab environment, the evaluation of APACHE devices through transmission experiments and the preparation and the realization of the experimental characterization of the devices at the Ericsson Multihaul 3000 systems. More specifically, the optical regenerator was tested for its transmission performance in a recirculating loop with pairs of OOK and DPSK signals at 22 Gb/s. The WDM array lasers (i.e. DFB and RSOA 10-channel laser sub-blocks with 100 GHz spacing) and the single InP IQ modulator were also tested indeed using the same recirculation loop setup at ICCS/NTUA and the Multihaul 3000 system at Ericsson Italy and utilizing direct and coherent detection schemes. Moreover, the Reflective electro-absorption modulators (REAMs) sub-block were successfully combined with the 10-channel RSOA laser in a functionally integrated transmitter for 10×10 Gb/s OOK transmitter and tested over the ICCS/NTUA transmission testbed and the Multihaul 3000 system. Finally, benchmarking of the APACHE 10G transmitter modules (RSOA laser array and REAM modulator array) with 10G Ericsson transponders in a hybrid 10G/40G metro network scenario revealed that the performance for the 10 Gb/s channels is at the samelevel of induced power penalty on the 40 Gb/s channels when the 10G and the 40G signals were propagating over the same link.

Work package 6: Dissemination & exploitation

WP6 ran through the entire duration of the project to ensure interaction of the project with industry, academia and the scientific community. Its objectives included the exploitation and the use of the project outcomes, the dissemination of the project foreground knowledge, the protection of IPR and the possible contributions to standardization bodies.
The exploitation of the APACHE foreground knowledge was aimed and will continue to be aimed, mainly through the commercialization paths of PhoeniX Software, CIP and HHI. On the other hand, Ericsson had on the opportunity to assess the performance of the developed devices in the Multihaul 3000 system and compare the APACHE devices against existing transponder solutions. Their interest for the APACHE technology remains high. Finally, the academic partners ICCS/NTUA and AIT also consolidated exploitation plans building upon the know-how and the experience they have gained on the design of integrated optical circuitry and the handling (generating, processing, detecting) of advanced modulated signals.
Regarding the dissemination activities, APACHE concepts and results were being disseminated through scientific publications (over 25 during the 42-month period of the project), technical presentations in articles and societies, organization of booths and participation in workshops and other events.


Europe is currently a key player in photonic semiconductor development technology with application in telecommunications. APACHE is bound to further strengthen Europe’s status against US and Japan and aid European industry to take the leading role in the field. From the technology point of view, further development of the “monolithic-on-hybrid” platform that was on the front-line of APACHE research, will allow for the implementation of large-scale, complex photonic integrated devices using a combination of chip foundries that will dramatically increase the potential of hybrid integration technology. Furthermore, the developed software provides a multi-functional tool that allows for faster design of photonic integrated components using multiple material systems and achieving optimized yield for the entire fabrication process, thus achieving complex integrated components with lower cost.

Use and dissemination of foreground

In this section, the dissemination and the exploitation of the project outcomes through interactions with industry, academia, and the scientific community and the potential impact of APACHE technology are presented.
The dissemination activities carried out within the APACHE project are described below per partner.

E-UK/IT and E-SW: Within Ericsson the aims of APACHE and progress on APACHE project activities have been disseminated to R&D and business facing people, mainly through the experimental work during the final phase of the project.

CIP: CIP had booths at the major photonics conferences (OFC and ECOC) and discussed with current and potential customers the HyBoard platform being developed under APACHE.

PhoeniX Software: PhoeniX Software aimed to disseminate the project foreground knowledge through presentations in relevant conferences (ECIO-OWTNM), exhibitions (Photonics Europe, MNE), workshops and through the web-site. Moreover, the PhoeniX Software website has been updated to accommodate the new category of Design Kits. A whole new design has been created and implemented, including optimization methods for Google.

HHI: HHI has presented the results achieved within APACHE at different international conferences, journals and exhibitions (ECOC, OFC, IPRM, PTL and JQE) to attract attention and interest of industrial partners and/or other national/European sponsors for further product development at HHI. In the future similar presentations are planned (e.g. exhibitions accompanying ECOC 2012, OFC 2012 and others).

ICCS/NTUA: ICCS/NTUA, as coordinator of APACHE project, carried out a series of dissemination activities in order to increase the visibility of the project to a wide range of population groups, including the scientific community, students of different educational levels as well as the general public. ICCS/NTUA has submitted a number of scientific papers to peer-reviewed international conferences and journals. In addition, ICCS/NTUA submitted an article to the SPIE newsroom after an invitation to present the vision and the latest research outcomes of APACHE. Moreover, ICCS/NTUA arranged the participation of APACHE in a number of conference booths and exhibitions (ECOC 2009, SPIE EUROPE 2010, ECOC 2010, OFC 2011, ECOC 2011) and prepared brochures, posters and multi-media presentations as promoting material, whereas CIP provided optical chips (silica circuits) that were exhibited during the events.


Figure 4: (a) APACHE poster at EURO-FOS booth at ECOC 2010 in Torino, and (b) APACHE integrated chips and brochures at EURO-FOS booth at OFC 2011.

Finally, ICCS/NTUA has made a number of presentations and laboratory demonstrations APACHE technology to graduate and undergraduate students, it has incorporated material related to the project activities in the lectures of undergraduate and postgraduate courses of the School of Electrical and Computer Engineering. APACHE-related presentations and laboratory demonstrations were organized giving the students the opportunity to get a hand-on experience with components developed under APACHE project.
Dissemination to the general public: ICCS/NTUA disseminated its APACHE related activities to 28 final year students of the 3rd Lyceum of Menidi (Attica), through a presentation and lab demonstration aiming to make young students aware of the role that photonics is having in modern world and the efforts that ICCS/NTUA is making to be competitive at a pan-European level.

AIT: AIT participated in the preparation of several publications during the period of APACHE.

The Project’s Public web-site

The official website of the APACHE project (http://www.ict-apache.eu/) contains all the updated information regarding the concept, the consortium, the objectives and the publications providing to the viewer an easy way to explore the aforementioned topics through a friendly interface. The contact persons, also presented in the website, are Prof. Hercules Avramopoulos from ICCS/NTUA as project coordinator (Tel: +30 210 7722 076/Fax: +30 210 7722 077) and Dr. Graeme Maxwell for CIP as technical manager (Tel: +44 1473 663210/Fax: +44 1473 663295).

The Project’s Public web-site

Contractors involved