Projects

Panther

PANTHER: PAssive and electro-optic polymer photonics and InP electronics iNtegration for multi-flow Terabit transceivers at edge SDN switcHes and data-centER gateways
[January 2014 – December 2016]

PCRL coordinates PANTHER. Multi-rate, multi-format and multi-reach operation of optical transceivers is important, but it is not enough for next generation terabit products. What is still missing to make these products viable is a solution for the flexible control of this enormous capacity at the optical layer and its distribution among a number of independent optical flows. PANTHER aims to provide this solution and develop multi-rate, multi-format, multi-reach and multi-flow terabit transceivers for edge switches and data-center gateways. To this end, PANTHER combines electro-optic with passive polymers and develops a novel photonic integration platform with unprecedented potential for high-speed modulation and optical functionality on-chip. It also relies on the combination of polymers with InP gain chips and photodiode arrays, and on the use of the InP-DHBT platform for driving circuits based on 3-bit power-DACs and high-speed TIA arrays. Using 3D integration techniques, PANTHER integrates these components in compact system-in-package transceivers capable of operation at rates up to 64 Gbaud, operation with formats up to DP-64-QAM, spectral efficiency up to 10.24 b/s/Hz, capacity using a dual-carrier scheme up to 1.536 Tb/s, and flexibility in the generation and handling of multiple optical flows on-chip. This impressive performance comes with a potential for 55% power consumption reduction and more than 60% cost/bit reduction, taking into account benefits from the material system, the integration concept, the operation at high baud-rates and the possibility for IP traffic offloading. PANTHER incorporates the transceivers in edge switch and data-center gateway architectures and evaluates their performance in lab and real-network settings. Finally, PANTHER develops a thin software layer that controls the operation parameters of the transceivers, pioneering in this way the efforts for extending the SDN hierarchy down to the flexible optical transport.

Targets

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Dr. Christos Kouloumentas

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Spirit

SPIRIT: Software-defined energy-efficient Photonic transceivers IntRoducing Inteligence and dynamicity in Terabit superchannels for flexible optical networks
[December 2013 – November 2016]

PCRL coordinates SPIRIT. Bandwidth‐hungry end‐user applications are stretching physical layer capacity and dictating the migration towards software-defined flexible architectures. Fully-programmable optical components supporting rate- and format-adaptation are urgently needed. SPIRIT fabricates low-cost, energy-efficient flexible transceivers that are capable of gridless operation and are compatible with both current and future applications. Single- and multi-carrier (OFDM) QAM formats are supported up to a spectral efficiency of 16 bits/s/Hz (DP-256-QAM), for throughputs of up to 1Tbit/s from a single-package transceiver. Interfacing to an external FPGA allows dynamic adjustment of the symbol rate (up to 32GBaud) and modulation format. Novel segmented-electrode InP IQ-MZMs with Vπ≈1V are developed. This allows direct digital drive using mature, high-yield CMOS electronics; SPIRIT therefore benefits from the dominant technology in IC fabrication, constituting a cost-effective, ultra-low-power solution. On‐chip, 5-bit multi-level functionality enables arbitrary optical waveform generation and transmitter-side DSP. Record-low power consumption (1.8W per MZM arm) for a device of this resolution is targeted. Compared to current transmitters, more than 50% power consumption reduction is expected for 400G and 1T applications. The CMOS electronics and InP photonics are integrated on a SOI platform, including coherent receivers and a novel, flexible MUX/DEMUX based on micro-ring filters, enabling spectrally efficient aggregation/segmentation of superchannels. The latter will be tunable across the entire C-band for truly gridless operation and fine-granularity spectrum slicing.SPIRIT will introduce intelligence in the optical layer. It envisages development of a software-defined network emulation platform that includes DSP performance monitoring for QoS management at the physical layer. Participation by industry leaders ensures a clear commercial exploitation path

PCRL contact person: Dr. Dimitris Apostolopoulos

Targets

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Nephele

eNd to End scalable and dynamically reconfigurable oPtical arcHitecture for application-awarE SDN cLoud datacentErs [February 2015 – January 2018]

PCRL is coordinating NEPHELE project, developing a dynamic optical network infrastructure for future scale-out, disaggregated datacenters. NEPHELE’s end-to-end solution extends from the datacenter architecture and optical subsystem design, to the overlaying control plane and application interfaces. NEPHELE builds on the enormous capacity of optical links and leverages hybrid optical switching to attain the ideal combination of high bandwidth at reduced cost and power compared to current datacenter networks.

A fully functional control plane overlay is being developed, comprising a Software-Defined Networking (SDN) controller along with its interfaces. The southbound interface abstracts physical layer infrastructure and allows dynamic hardware-level network reconfigurability. The northbound interface links the SDN controller with the application requirements through an Application Programming Interface. NEPHELE’s innovative control plane merges hardware and software virtualization over the hybrid optical infrastructure and integrates SDN modules and functions for inter-datacenter connectivity, enabling dynamic bandwidth allocation based on the needs of migrating VMs and existing Service Level Agreements for transparent networking among telecom and datacenter operators’ domains.

PCRL contact person: Dr. Paraskevas Bakopoulos

Targets

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ActPhast

ACTPHAST: Access Center for Photonics Innovation Solutions and Technology Support
[November 2013 – October 2017]

ACTPHAST is a unique “one-stop-shop” European access centre for photonics innovation solutions and technology support. ACTPHAST will support and accelerate the innovation capacity of European SMEs by providing them with direct access to the expertise and state-of-the-art facilities of Europe’s leading photonics research centres, enabling companies to exploit the tremendous commercial potential of applied photonics. Technologies available within the consortium range from fibre optics and micro optics, to highly integrated photonic platforms, with capabilities extending from design through to full system prototyping. ACTPHAST has been geographically configured to ensure all of Europe’s SMEs can avail of timely, cost-effective, and investment-free photonics innovation support, and that the extensive range of capabilities within the consortium will impact across a wide range of industrial sectors, from communications to consumer-related products, biotechnology to medical devices. The access of SMEs to ACTPHAST capabilities will be realised through focused innovation projects executed in relatively short timeframes with a critical mass of suitably qualified companies with high potential product concepts. Furthermore, through its extensive outreach activities, the programme will ensure there is an increased level of awareness and understanding across European industries of the technological and commercial potential of photonics.

PCRL participates in ACTPHAST in a three-fold manner: (i) as technology provider in photonics telecom and datacom domains; (ii) one appointed member (Prof. Avramopoulos) in the Technical Coordination Team (TCT) of ACTPHAST and (iii) formal representative of ACTPHAST’s outreach activities in the area of Greece, Cyprus, Bulgaria, Romania and Malta.

PCRL contact person: Dr. Dimitris Apostolopoulos

Targets

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Biofos

BIOFOS: Micro-ring resonator-based biophotonic system for food analysis
[November 2013 – October 2016]

PCRL is coordinating BIOFOS. Current methodologies for detection of food contamination based on heavy analytical tools cannot guarantee a safe and stable food supply. The reasons are the complexity, the long time-to-result (2-3 days) and the cost of these tools, which limit the number of samples that can be practically analyzed at food processing and storage sites. The need for screening tools that will be still reliable but simple, fast, low-cost, sensitive and portable for in-situ application is thus urgent. BIOFOS aims to address this need through a high-added value, reusable biosensor system based on optical interference and lab-on-a-chip (LoC) technology. To do this, BIOFOS combines the most promising concepts from the photonic, biological, nanochemical and fluidic parts of LoC systems, aiming to overcome limitations related to sensitivity, specificity, reliability, compactness and cost issues. BIOFOS relies on the ultra-low loss TriPleX photonic platform in order to integrate on a 4×5 mm2 chip 8 micro-ring resonators, a VCSEL and 16 Si photodiodes, and achieve a record detection limit in the change of the refractive index of 5•10-8 RIU. To support reusability and high specificity, it relies on aptamers as biotransducers, targeting at chips for 30 uses. Advanced surface functionalization techniques are used for the immobilization of aptamers, and new microfluidic structures are introduced for the sample pre-treatment and the regeneration process. BIOFOS assembles the parts in a 5x10x10 cm3 package for a sample-in-result-out, multi-analyte biosensor. The system is validated in real settings against antibiotics, mycotoxins, pesticides and copper in milk, olive oil and nuts, aiming at detection below the legislation

limits and time-to-result only 5 minutes. Based on the reusability concept, BIOFOS also aims at reducing the cost per analysis by at least a factor of 10 in the short- and 30 in the mid-term, paving the way for the commercial success of the technology.

PCRL contact person: Dr. Christos Kouloumentas

Targets

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Orchestra

Optical peRformanCe monitoring enabling dynamic networks using a Holistic cross-layEr, Self-configurable Truly flexible appRoAch
[February 2015 – January 2018]

PCRL participates in the ORCHESTRA project which aims to develop a highly-flexible optical network that can be dynamically reconfigured and optimized. It does this by constantly monitoring impairment information provided by the network’s coherent transceivers that are extended, almost for free, to operate as software defined multi-impairment optical performance monitors (soft-OPM). Information from multiple soft-OPMs can be correlated to infer information for unmonitored or un-established paths, effectively supporting alien wavelengths, and localize QoT problems and failures. The network is viewed as a continuously running process that perceives current conditions, decides, and acts on those conditions. ORCHESTRA‘s advanced cross-layer optimization procedures will be implemented within a new specifically designed library module, called DEPLOY. A new dynamic and hierarchical control and monitoring (C&M) infrastructure will be then created to interconnect the multiple soft-OPMs and the proposed virtual and real C&M entities running the DEPLOY algorithms,  exploiting the reconfigurability capabilities of enhanced tunable transceivers. At the top of the hierarchical infrastructure, a novel OAM Handler prototype will be implemented, as part of the SDN-based ABNO architecture. The proposed C&M infrastructure will be enriched with active-control functionalities, closing the control loop, and enabling the network to be truly dynamic and self-optimized.

PCRL’s role in the project is concerned with the physical layer aspects of ORCHESTRA. Specifically, it will develop a flexible optical transceiver prototype based on discrete commercial components, capable of multiple QAM formats and variable throughputs. PCRL will also develop DSP algorithms for software-defined impairment-monitoring.

PCRL contact person: Dr. Stefanos Dris

Targets

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Mirage

MIRAGE: MultI-coRe, multi-level, WDM-enAbled embedded optical enGine for TErabit board-to-board and rack-to-rack parallel optics
[October 2012 – May 2016]

PCRL coordinates MIRAGE, which aims to implement cost-optimized components for terabit optical interconnects introducing new multiplexing concepts through the development of a flexible, future-proof 3D “optical engine”.

MIRAGE is a 3-year collaborative project on photonic integration that brings together seven leading European universities, research centers and companies. The project was launched in October 2012 and is co-funded by the European Commission through the Seventh Framework Programme (FP 7).

The Internet is changing: it is rapidly reshaping into a content-centric network, where billions of users demand instant access to vast amounts of data. Currently online content makes up an enormous capacity of more than 500 billion gigabytes, all of which resides in datacenters. Datacenters are massive facilities consisting of hundreds or even thousands of servers interconnected with each other. Being the repositories of online content, datacenters are now becoming the “hot spots” of the internet and content providers face up to the challenge of increasing the interconnection speed to improve data delivery to the end user.

MIRAGE aims to raise the bar of optical-interconnect technology currently used in data centers and bring it to the terabit scale. To achieve its challenging mission, the project has defined a multidisciplinary work-plan with objectives that span from material research to cutting edge integration techniques and circuit design, streamlined towards suitability for commercial uptake.

PCRL contact person: Dr. Paraskevas Bakopoulos

Targets

  • develope silicon photonic-electronic platform for 3D EPICs
  • develope monolithic CWDM long-wavelength VCSEL arrays with 40 Gb/s/modulation bandwidth
  • develope advanced methodology for industry-compatible component 3D assembly & packaging
  • develope low cost techniques for multicore-fiber coupling
  • fabricate application-specific components using the developed 3D optical engine
  • Evaluate fabricated components in application scenarios

PhoxTrot

PhoxTroT: PHOtoniCS for High-Performance, Low-Cost & Low-Energy Data Centers, High Performance Computing Systems: TeRabit/s Optical Interconnect Technologies for On-Board, Board-to-Board, Rack-to-Rack data links
[October 2012 – September 2016]

PhoxTroT is a large-scale research effort focusing on high-performance, low-energy and cost and small-size optical interconnects across the different hierarchy levels in data center and high-performance computing systems: on-board, board-to-board and rack-to-rack. PhoxTroT will tackle optical interconnects in a holistic way, synergizing the different fabrication platforms in order to deploy the optimal “mix&match” technology and tailor this to each interconnect layer. PhoxTroT will follow a layered approach from near-term exploitable to more forward looking but of high expected gain activities.

PCRL contact person: Dr. Dimitris Apostolopoulos

The objective of PhoxTroT is the deployment of

  • Generic building block that can be used for a broad range of applications, extending performance beyond Tb/s and reducing energy by more than 50%.
  • A unified integration/packaging methodology as a cost/energy-reduction factor for board-adaptable 3D SiP transceiver and router optochip fabrication.
  • The whole “food-chain” of low-cost and low-energy interconnect technologies concluding to 3 fully functional prototype systems: an >1Tb/s throughput optical PCB and >50% reduced energy requirements, a high-end >2Tb/s throughput optical backplane for board-to-board interconnection, and a 1.28Tb/s 16QAM Active Optical Cable that reduces power requirements by >70%.

Targets

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Previous/Completed projects

RAMPLAS

Silicon-based, integrated Optical RAM enabling High-Speed Applications in Computing and Communication
[September 2011 – September 2014]

PCRL participated in the EU-funded project RAMPLAs, a cross-disciplinary project that aimed to revisit the fundamentals of optical RAM technology and to develop the first 100GHz RAM chips, fostering their effective application in ultra-fast energy-efficient computing architectures and optical communication systems. RAMPLAS followed a holistic approach and blended innovation in computer science, optical design, photonic integration and semiconductor physics. Novel epitaxial methods for the fabrication of ultrafast dilute-nitride-antimonide on GaAs (InGaAsNSb/GaAs) SOAs acting as active elements for the 100GHz optical RAM chips and being capable of uncooled operation. Heterointegration techniques on established SOI technology paved the way towards the development of densely integrated optical multi-bit RAMs and kByte capacities. The research outcomes of RAMPLAS have been evaluated in a solid proof-of-concept validation plan based both on simulations and experiments, intending to set the scene for new paradigms in Computing, Communications and Test & Measurement. PCRL’s role was to identify application scenarios of the optical RAM in the latter two fields and to evaluate the system-level performance of the RAM-chips.

Polysys

Project Overview

POLYSYS aimed to realize for the first time serial 100 Gb/s direct connectivity in rack-to-rack and chip-to-chip data communications systems. In specific, POLYSYS focused on the development of photonic and electronic components operating directly at 100 Gb/s based on electro-optic polymers enabling the best possible material compatibility with current polymer-based optical backplanes. The technical objectives of POLYSYS were achieved through the cost-effective polymer material system for realizing the electro-optic components and the utilization of InP for developing high-performance optical and optoelectronic components.

After 40 months of development efforts it can be said that POLYSYS has been extremely successful in helping EO polymers evolve from a device specific technology into a broader purpose platform for small-scale and high-performance integrated circuits for datacom applications. Achievements to this direction include:

  • The monolithic integration of MMI couplers and tunable Bragg-gratings together with MZMs on EO polymer chips.
  • The hybrid integration of InP chips (laser diodes, gain chips, photodiodes) with EO polymer chips and the development of lasers with 17 nm tunability combining InP gain chips with monolithic Bragg-gratings.
  • The integration of EO polymer chips with InP-DHBT circuits using wire-bonds and the packaging of integrated transmitter modules.

At the same time, POLYSYS has also been extremely successful in extending the limits of InP photodetector technology and developing quad arrays of pin-photodiodes and pinTWAs with potential for 100G operation, as well as in advancing the state-of-the-art of InP-DHBT technology and developing novel MUX-DRV circuits and twin-DEMUX circuits for operation at 100 Gb/s. Through the integration of all these components, POLYSYS has impressively achieved the final packaging of six out of the seven modules that had targeted:

  • The 100 Gb/s transmitter
  • The 2×100 Gb/s transmitter
  • The tunable 100 Gb/s transmitter
  • The 100 Gb/s integrated optical interconnect
  • The 4×100 Gb/s pin-DEMUX receiver
  • The 4×100 Gb/s pinTWA-DEMUX receiver

Four of these modules (100G Tx, 2x100G Tx, tunable 100G Tx and 4x100G pin-DEMUX receiver) were successfully tested and confirmed the potential for error-free operation at 80 and 100 Gb/s and transmission over SMF links of at least 1km without dispersion compensation, whereas the testing of a fifth one (4x100G pinTWA-DEMUX) will be completed after the final review meeting.

POLYSYS gained remarkable visibility through a variety of dissemination actions and prestigious publications (including the ECOC 2012 PDP), and succeeded in defining concrete exploitation plans by all partners. Significant achievements that are related to the actual exploitation of the foreground knowledge are the industrial strategic partnership between GigOptix and HHI in the last period of the project and the funding of a follow-up research project (http://www.ict-panther.eu/) that was based on the knowhow of POLYSYS.

PCRL contact person: Dr. Christos Kouloumentas

Targets

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Galactico

blendinG diverse photonics And eLectronics on silicon for integrAted and fully funCTIonal COherent Tb Ethernet
[October 2010 – September 2013]

PCRL participated in GALACTICO, a collaborative project that developed photonic integration technology enabling cost-effective components for high-capacity 100Gb/s long-haul networks. GALACTICO aimed to squeeze current bulky and costly 100GbE interfaces into silicon-based PICs and provide integrated coherent transmitters and receivers that deliver a massive amount of aggregate bandwidth. The GALACTICO integration approach relied on the right mix of the three most established material systems, i.e. InP, GaAs, Si and combined their strengths on a common silicon platform, thus achieving low-cost, high performance and large scale of integration. To address scalability, GALACTICO integrated 6x100Gb/s DWDM transmitters and receivers, utilizing on-chip arrays of GaAs IQ-modulators and InP photodetectors. Further increase of the channel rate achieved through the development of integrated multi-level SiGe HBT electronic drivers, enabling line rates beyond 200Gb/s with higher-order QAM modulation formats. PRCL was responsible for subsystem design, component characterization and system experimental evaluation.

Targets

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Platon

Merging Plasmonic and Silicon Photonics Technology towards Tb/s routing in optical interconnects
[January 2010 – December 2012]

PCRL participated in project PLATON that aimed to be the first project that will realize Tb/s optical routing fabrics for optical interconnects in backplanes and BladeServers adopting plasmonics as its disruptive technological vehicle. Application of surface plasmon polaritons (SPPs) in nanophotonics is an effective means to guide and manipulate optical signals on subwavelength scale and below the diffraction limit of light. PLATON exploited SPPs to develop the first ultra-compact Dielectric Loaded Surface Plasmon Polariton (DLSPP) switches capable to route real data for BladeServer and backplane optical interconnects with very small footprint (<15×40 µm2), consuming very low powers (<15mW) and exhibiting negligible latency lower than 250fsec. PLATON used these switches as building blocks on a CMOS compatible SOI optical integration board to merge plasmonics, silicon nanophotonics and electronic ICs. As such PLATON ideally blended the small size and low power switching capabilities of plasmonics with the low loss of silicon and processing capacity of electronics, to provide miniaturized and power efficient, Tb/s photonic interconnect routers for ultra-performance data communications.

Targets

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EURO-FOS

Pan-European Photonics Task Force: Integrating Europe’s Expertise on Photonic Subsystems
[May 2008 – April 2012]

PCRL coordinated project EURO-FOS that aims to create a powerful pan-European network on photonic subsystems by clustering top European systems groups with expertise in the design, development and evaluation of photonic subsystems. The creation of a unified and coherent European network of researchers with excellence in this field ensures that Europe excels in this crucial part of the photonic systems development chain that links device-level physics and network architectures.

EURO-FOS also aims to create an academic pan-European laboratory and bridge the gap created by the shutdown or downsizing of major R&D industrial labs and help innovative SMEs that find it increasingly difficult to allocate R&D expenditure for basic research and expensive testing facilities. The creation of the pan-European lab with diverse R&D capabilities, highly-skilled scientific personnel and state-of-the-art testing facilities, critically assist Europe’s industry to perform innovative research and evaluate their developed technology in a system environment with advanced equipment and using accurate methods defined by EURO-FOS researchers.

Targets

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Boom

Terabit-on-chip: micro and nano-scale silicon photonic integrated components and sub-systems enabling Tb/s capacity, scalable and fully integrated photonic routers
[May 2008 – April 2011]

PCRL coordinated project BOOM, a photonic integration project that aimed to pursue the systematic advancement of Silicon-on-Insulator (SOI) integration technology to develop compact, cost-effective and power efficient silicon photonic components that enable photonic Tb/s capacity systems for current and new generation high speed broadband core networks. BOOM developed fabrication techniques as well as flip-chip bonding and wafer-scale integration methods to fabricate and mount the complete family of III-V components on SOI boards. BOOM SOI optical board technology is able to blend the cost-effectiveness and integration potential of silicon with the high bandwidth and processing power of III-V material and provide a new generation of functional and miniaturized photonic components. BOOM performed system-level integration of these components to assemble the first prototype rack-mount, ultra-high capacity routing platform based on silicon photonics that requires minimum board space and power consumption and achieve a total throughput of 640 Gb/s.

Targets

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Apache

Agile Photonic Integrated Systems-on-Chip enabling WDM Terabit Networks
[April 2008 – March 2011]

PCRL coordinated project APACHE that aims to extend photonic circuit integration capabilities and demonstrate small form-factor, multi-format, multi-channel integrated transmitters, receivers and regenerators, capable to handle Terabit/s capacities on a single photonic integrated chip. APACHE defined the fabrication steps and developed for the first time the simulation and design tools that were instrumental in designing large-scale, high functionality photonic chips. The APACHE integration concept relied on the combination of Indium-Phosphide monolithic arrays, silicon submounts and silica-on-silicon planar lightwave circuits. This ‘monolithic-on-hybrid’integration approach allowed the increase of integration scale and the realization of complex, low loss and low power consumption, passive/active photonic integrated circuits. APACHE integration technology can achieve up to 80% cost reduction and more than twenty times chip size reduction in multi-channel transmitter/receiver chips that are capable of handling Terabit/second capacities.

Targets

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BONE

Building the Future Optical Network in Europe
[January 2008 – December 2010]

PCRL participated in the NoE project BONE that aims at integrating European researchers engaged in the field of optical networks and optical fiber technologies. Within the frames of BONE project, PRCL collaborates with other system research groups for advancing research on optical signal processing techniques and all-optical network architectures.

Targets

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MultiWave

Cost-effective MULTI-WAVElength Laser System
[November 2005 – October 2007]

MULTIWAVE was a CRAFT project aiming at developing an agile and cost-effective multi-wavelength source in a single package. The laser system consists of three fundamental building blocks: (1) an initial pulse generating laser source, namely a passively mode-locked laser, (2) a spool of Photonic Crystal Fiber for the creation of ultra-broad spectrum and (3) a comb-generating filter as the channel spacing selection stage. The developed optical source is capable of generating ITU-grid WDM channels across S, C and L bands. PCRL participated as the RTD partner in the project, and the group’s role was the design and development of the channel spacing upgrade modules and the experimental performance characterization of the MULTIWAVE laser system.

Targets

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e-PHOTON ONE

Optical Networks: Towards Bandwidth Manageability and Cost Efficiency
[March 2004 – February 2008]

The Network of Excellence (NoE) e-Photon/One focused on the ‘Broadband for All’ strategic objective of the IST 1st call, targeting network-oriented and system-oriented aspects of the optically enabled Broadband. PCRL participated in e-Photon/One among universities and research centers active in optical networking and transmission. The key objective of e-Photon/ONe was to establish a long-term collaboration between different partners, in terms of research, of infrastructure sharing, and of education and training.

Targets

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MUFINS

Multi – Functional In tegrated Arrays of Interferometric Switches
[September 2004 – August 2007]

The MUFINS project aimed to take the next logical step in the evolution of all-optical signal processing, to integrate multiple switching elements on a single chip, and to interconnect these integrated switching elements into functional logic modules with the aid of a external components. 2×2 Mach Zehnder Interferometers that operate as all-optical switches were fabricated as two and four element integrated arrays. These switches were used as the main building blocks for the development of a wide range of functionalsubsystems, such as Header Extraction, Half Adder, Full Adder, Time Slot Interchanger, Clock and Data Recovery, Data Vortex Switch, 4×4 Switching Matrix, all- optical 4-wavelength Burst Mode Receiver, 40 Gb/s all-optical Burst Mode Receiver.

Targets

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LASAGNE

All-optical LAbel-SwApping employing optical logic G ates in NEtwork nodes
[January 2004 – December 2006]

PCRL participated in the LASAGNE project that aimed at studying, proposing and validating the use of all-optical logic gates and optical flip-flops based on commercially-available technologies to implement the required functionalities at the metro network nodes in All-optical label swapping (AOLS) networks. The optical gates were implemented using the same key building block: SOA-based Mach-Zehnder interferometers (MZIs). A functional photonic router prototype incorporating all-optical label swapping and wavelength conversion was integrated using optical logic gates and optical flip-flops. This photonic router was designed to be modular, scalable, and with potential for system integration.

Targets

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DO_ALL

Digital Optical Logic Modules
[November 1998 – September 2002]

PCRL coordinated project DO_ALL, a project within the ESPRIT frame-programme. The aim of project DO_ALL was to research in a systematic way the state-of-the-art in high-speed all-optical logic and to develop novel signal processing concepts and technologies. In this respect, DO_ALL has defined, designed, and developed the necessary set of devices and modules required for the construction of optical logic circuits and has applied them into application experiments of nontrivial functionality to qualify their performance and limitations. Within this frame, the applications that have been explored were (1) the demonstration of all-optical bit-error-rate (BER) measurements capability and (2) the demonstration of an optically addressable exchange–bypass switch using all-optical techniques. The first application was selected so as to investigate whether it is possible to build a complex optical circuit consisting of several optical logic modules that would challenge in performance the corresponding electronic designs. The second application was chosen so as to demonstrate that the logical functionality of optical circuits is advantageous since in this instance one optical gate can replace several electronic gates

Targets

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  • Lorem ipsum dolor sit amet, consectetur adipiscing elit. Morbi cursus a ante sit amet suscipit.